1. Technical Field
This application is directed to a method of testing flip-chip packages for integrated circuits.
2. Background Art
Flip-chip technology is defined as mounting the chip on a substrate using a variety of interconnect materials and methods as long as the chip surface, i.e. the active circuit, is facing the substrate. In this technique, solder bumps are attached to the input-output pads of the die at the wafer level. The flip-chip technique is the high-performance alternative to wire bonding techniques. Flip chips are cost effective and allow the realization of very slim and compact products, with increased I/O density and system miniaturization.
The most well-known and successful flip-chip technology today, IBM's solder-bumped flip-chip technology, evolved into the ball-grid array (BGA) packaging of integrated circuits. BGA packaging is scaling into smaller solder ball pitches and smaller individual solder ball sizes. Due to this smaller size, the requirements on packaging reliability, including the solder joint reliability, are becoming stricter. There are several different testing techniques of solder joint reliability in use in the industry, concentrating mostly on thermal performance.
There is a need for a mechanical stress testing technique, preferably using a relatively simple and inexpensive instrument. The ideal test environment would be the one very close to the application environment, with the possibility to produce an impact on the flip-chip package in a controllable way. The proposed method and apparatus of flip-chip test environment describes a testing process including different types of impact vehicles.